the future of analog ic technology descri ption the MPGC01 is a monolithic step- down switch mode converter with a built-in hig h -side powe r mosfet an d a gate dri v er for low-side external mosfet. it achieves 8a contin uous outpu t current over a wide input supply range with excellent loa d and line re gulation. current mo de operatio n provides f a st transien t response an d eases loo p stabilizatio n . fau lt co nd it ion p r ot ectio n inclu d e s cycle -by- cycle cur r en t lim it ing and th er mal shu t d o w n . the mpgc 01 r e q u ir es a minimu m number of read ily available sta nda rd ext e rn al compo n e n t s and is ava ilable in a 8 - pin soic p a ckag e w i th exposed pa d . features ? wide 5v to 16v operating input range ? 8a output current ? 33m ? internal power mosfet switch ? synchronous gate driver delivers up to 95% efficien cy ? fixed 600khz frequency ? cycle-by-cycle over cu rrent protection ? thermal sh utdown ? output adjustable from 0.8v to 5v ? stable with low esr output ceramic capacitors ? available in a thermally enhanced 8-pin soic packa ge appli c ations ? graphics cards ? distributed power systems ? ddr memor y ? pre-regulator for linear regulators ?mp s ? and ?th e fu ture o f a nal og ic t e chno lo gy ? are r e g i ste r ed t r a dem ar ks o f monolithic pow e r sy st em s , inc. typical application MPGC01 sw bg fb gnd bst in vcc en v out 1.8v/8a c4 100nf v in 5v -16v off on www.datasheet.co.kr datasheet pdf - http://www..net/
MPGC01 ? 8a, 16v, 600khz step-down with synchronous gate driver preliminary specifications subject to change ? internal use only MPGC01 rev. 0.1 www.monolithicpower.com 2 11/17/2006 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2006 mps. all rights reserved. package reference part number* package temperature MPGC01dn soic8n ?40 c to +85 c * for tape & reel, add suffix ?z (eg. MPGC01dn?z) for rohs compliant packaging, add suffix ?lf (eg. MPGC01dn?lf?z) absolute maxi mum ratings (1) supply voltage v in ....................................... 18v v sw ....................................... ?0.3v to v in + 0.3v v bs ....................................................... v sw + 6v all other pins................................. ?0.3v to +6v junction temperature...............................150 c lead temperature ....................................260 c storage temperature ..............?65 c to +150 c recommended operating conditions (2) supply voltage v in .............................. 5v to 16v output voltage v out .......................... 0.8v to 5v operating temperature .............?40 c to +85 c thermal resistance (3) ja jc soic8n .................................. 50 ...... 10... c/w notes: 1) exceeding these ratings may damage the device. 2) the device is not guaranteed to function outside of its operating conditions. 3) measured on approximately 1? square of 1 oz copper. electrical characteristics v in = 12v, t a = +25 feedback voltage v fb 5v v in 16v 0.790 0.810 0.830 v feedback current i fb v fb = 0.8v 10 na switch on resistance (4) r ds(on) 33 m
switch leakage v en = 0v, v sw = 0v 0 50 a current limit (4) 10 a oscillator frequency f sw v fb = 0.6v 600 khz fold-back frequency v fb = 0v 150 khz maximum duty cycle v fb = 0.6v 90 % minimum on time t on v fb = 1v 100 ns under voltage lockout threshold rising 3.70 3.95 4.20 v under voltage lockout threshold hysteresis 440 mv en input low voltage 0.4 v en input high voltage 1.2 v v en = 2v 2 en input current v en = 0v 0 a supply current (shutdown) v en = 0v 0 a supply current (quiescent) v en = 2v, v fb = 1v 1.1 ma thermal shutdown 150 c gate driver sink impedance r sink 1
gate driver source impedance r source 4
gate drive current sense trip threshold 20 mv note: 4) guaranteed by design. sw bst vcc bg in en/sync fb gnd 1 2 3 4 8 7 6 5 top view exposed pad on backside www.datasheet.co.kr datasheet pdf - http://www..net/
MPGC01 ? 8a, 16v, 600khz step-down with synchronous gate driver preliminary specifications subject to change ? internal use only MPGC01 rev. 0.1 www.monolithicpower.com 3 11/17/2006 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2006 mps. all rights reserved. pin functions pin # name description 1 sw switch output. 2 bst bootstrap. this capacitor is needed to dr ive the power switch?s gate above the supply voltage. it is connected between sw and bs pins to form a floating supply across the power switch driver. a 0.1 f capacitor is recommended for use. 3 vcc bg driver bias supply. decouple with a 1 f ceramic capacitor. 4 bg gate driver output. connect th is pin to the synchronous mosfet. 5 gnd ground. this pin is the voltage reference for the regulated output voltage. for this reason care must be taken in its layout. this node should be placed outside of the d1 to c1 ground path to prevent switching current spikes from inducing voltage noise into the part. 6 fb feedback. an external resistor divider from the output to gnd, tapped to the fb pin sets the output voltage. to prevent current limit run away during a short circuit fault condition the frequency foldback comparator lowers the oscillator frequency when the fb voltage is below 250mv. 7 en on/off control. 8 in supply voltage. the MPGC01 operates from a +5v to +16v unregulated input. c1 is needed to prevent large voltage spikes from appearing at the input. www.datasheet.co.kr datasheet pdf - http://www..net/
MPGC01 ? 8a, 16v, 600khz step-down with synchronous gate driver preliminary specifications subject to change ? internal use only MPGC01 rev. 0.1 www.monolithicpower.com 4 11/17/2006 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2006 mps. all rights reserved. operation the MPGC01 is a current mode buck regulator. that is, the error amplifier output voltage is proportional to the peak inductor current. at the beginning of a cycle, m1 is off. the ea output voltage is higher than the current sense amplifier output, and the current comparator?s output is low. the rising edge of the 600khz clk signal sets the rs flip-flop. its output turns on m1 thus connecting the sw pin and inductor to the input supply. the increasing inductor current is sensed and amplified by the current sense amplifier. ramp compensation is summed to current sense amplifier output and compared to the error amplifier output by the current comparator. when the current sense amplifier plus slope compensation signal exceeds the ea output voltage, the rs flip-flop is reset and the MPGC01 reverts to its initial state (m1 off). if the sum of the current sense amplifier and the slope compensation signal does not exceed the comp voltage, then the falling edge of the clk resets the flip-flop. the ea output of the error amplifier integrates the voltage difference between the feedback and the 0.8v bandgap reference. the polarity is such that a fb pin voltage lower than 0.8v increases the ea output voltage. since the ea output voltage is proportional to the peak inductor current, an increase in its voltage increases current delivered to the output. an external synchronous mosfet supplies the inductor current when m1 is off. in en fb sw vcc bg gnd bst regulator oscillator 600khz driver current sense amplifier error amplifier current limit comparator pwm comparator driver d regulator reference -- + -- + -- + s r r q q -- + 54pf 1pf v cc v cc figure 1?functional block diagram www.datasheet.co.kr datasheet pdf - http://www..net/
MPGC01 ? 8a, 16v, 600khz step-down with synchronous gate driver preliminary specifications subject to change ? internal use only MPGC01 rev. 0.1 www.monolithicpower.com 5 11/17/2006 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2006 mps. all rights reserved. application information setting the output voltage the external resistor divider is used to set the output voltage (see the schematic on front page). the feedback resistor r1 also sets the feedback loop bandwidth with the internal compensation capacitor (see figure 1). choose r1 to be around 40.2k ? for optimal transient response. r2 is then given by: 1 v 8 . 0 v 1 r 2 r out ? = table 1?resistor selection for common output voltages v out (v) r1 (k ? ? 1.8 40.2 (1%) 32.4 (1%) 2.5 40.2 (1%) 19.1 (1%) 3.3 40.2 (1%) 13 (1%) 5 40.2 (1%) 7.68 (1%) selecting the inductor a 1 h to 10 h inductor with a dc current rating of at least 25% percent higher than the maximum load current is recommended for most applications. for highest efficiency, the inductor dc resistance should be less than 10m ? . for most designs, the inductance value can be derived from the following equation. osc l in out in out f i v ) v v ( v l ? ? = where ? i l is the inductor ripple current. choose inductor current to be approximately 30% of the maximum load current, 8a. the maximum inductor peak current is: 2 i i i l load ) max ( l ? + = under light load conditions below 100ma, larger inductance is recommended for improved efficiency. synchronous mosfet the external synchronous mosfet is used to supply current to the inductor when the internal high-side switch is off. it significantly reduces the power loss when compared against a schottky rectifier. table 2 lists example synchronous mosfets and manufacturers. table 2?diode selection guide part no. manufacture fds6670as fairchild irf7821 international rectifier selecting the input capacitor the input capacitor (c1) reduces the surge current drawn from the input and also the switching noise from the device. the input capacitor impedance at the switching frequency should be less than the input source impedance to prevent high frequency switching current from pass to the input. ceramic capacitors with x5r or x7r dielectrics are highly recommended because of their low esr and small temperature coefficients. for 8a applications, a 22 f capacitor is sufficient. selecting the output capacitor the output capacitor (c2) keeps output voltage small and ensures regulation loop stability. the output capacitor impedance should be low at the switching frequency. ceramic capacitors with x5r or x7r dielectrics are recommended. pc board layout the high current paths (gnd, in and sw) should be placed very close to the device with short, direct and wide traces. the input capacitor needs to be as close as possible to the in and gnd pins. the external feedback resistors should be placed next to the fb pin. keep the switching node sw short and away from the feedback network. www.datasheet.co.kr datasheet pdf - http://www..net/
MPGC01 ? 8a, 16v, 600khz step-down with synchronous gate driver preliminary specifications subject to change ? internal use only MPGC01 rev. 0.1 www.monolithicpower.com 6 11/17/2006 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2006 mps. all rights reserved. external bootstrap diode it is recommended that an external bootstrap diode be added when the system has a 5v fixed input or the power supply generates a 5v output. this helps improve the efficiency of the regulator. the bootstrap diode can be a low cost one such as in4148 or bat54. MPGC01 sw bs 10nf 5v figure 2?external bootstrap diode this diode is also recommended for high duty cycle operation (when in out v v >65%) and high output voltage (v out >12v) applications. www.datasheet.co.kr datasheet pdf - http://www..net/
MPGC01 ? 8a, 16v, 600khz step-down with synchronous gate driver preliminary specifications subject to change ? internal use only notice: the information in this document is subject to change without notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MPGC01 rev. 0.1 www.monolithicpower.com 7 11/17/2006 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2006 mps. all rights reserved. package information soic8n (exposed pad) see detail "a" 0.0075(0.19) 0.0098(0.25) 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.000(0.00) 0.006(0.15) 0.051(1.30) 0.067(1.70) top view front view side view bottom view note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length does not include mold flash, protrusions or gate burrs. 3) package width does not include interlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming) shall be 0.004" inches max. 5) drawing conforms to jedec ms-012, variation ba. 6) drawing is not to scale. 0.089(2.26) 0.101(2.56) 0.124(3.15) 0.136(3.45) recommended land pattern 0.213(5.40) 0.063(1.60) 0.050(1.27) 0.024(0.61) 0.103(2.62) 0.138(3.51) 0.150(3.80) 0.157(4.00) pin 1 id 0.189(4.80) 0.197(5.00) 0.228(5.80) 0.244(6.20) 14 85 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o 0.010(0.25) bsc gauge plane www.datasheet.co.kr datasheet pdf - http://www..net/
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